Among many semiconductor packages, Window Ball Grid Array (WBGA) is a semiconductor package with a slot opened in a chip-carrying substrate for passing bonding wires through the slot to electrically connect the substrate to the chip where the chip is attached to the top of the substrate. Then external terminals such as solder balls are disposed on the bottom surface of the substrate for mounting to an external printed circuit board. However, when a chip is attached onto the substrate by either liquid-type or paste-type chip-bonding adhesives, the chip-bonding adhesives become flowing due to raised temperatures and exerted pressures during the chip bonding processes leading to bleeding where the chip-bonding adhesives may bleed to bonding pads leading wire bonding failure. Therefore, the existing WBGA semiconductor package only can use die-attaching tapes to replace liquid-type or paste-type chip-bonding adhesives to avoid bleeding. Normally, the die-attaching tapes is only planarly attached to the active surface of a chip which is easily affected by the external stresses leading to delamination at the interface or fractures at the sides of the chips where the reliability and the quality of the conventional WBGA semiconductor package are impacted.
As shown in FIG. 1, a conventional WBGA semiconductor package primarily comprises a substrate 110 as a chip carrier, a chip 120, a die-attaching tape 130, a plurality of bonding wires 140, an encapsulant 150, and a plurality of external terminals 160. The substrate 110 has an internal surface 111, an external surface 112, and a slot 114 penetrating from the internal surface 111 to the external surface 112. The chip 120 has an active surface 121 and a plurality of bonding pads 124 disposed on the active surface 121. The chip-bonding adhesive 130 is attached to the active surface 212 of the chip 120 and to the internal surface 111 of the substrate 110 to firmly hold the chip 120 on the substrate 110 with the slot 114 exposed after die-attaching processes. A passivation layer 125 is formed on the active surface 121 of the chip 120. The bonding pads 124 are electrically connected to the substrate 110 by the bonding wires 140 passing through the slot 114. The encapsulant 150 encapsulates the chip 120 and the bonding wires 140. The external terminals 160 such as solder balls are disposed on the external surface 112 of the substrate 110. As shown in the enlarged drawing embedded in FIG. 1, since the die-attaching tape 130 is only partially attached to the passivation layer 125 on the active surface 121, thermal stresses during molding processes or temperature cycle test (TCT) will easily cause delamination of the passivation layer 125 from the chip 120 or fractures at the sides of the chip 120.